Building PetaFLOP HPC systems with energy-efficient processors

by Prof. Weiwu Hu (Institute of Computing Technology, Chinese Academy of Science, Beijing)

Monday 7 Jul 2008, 14:00 → 15:00 Europe/Zurich

IT Auditorium (CERN)

Godson-3 is a multi-core processor based on the 64-bit superscalar Godson-2 CPU core, which in turn is a four-issue, out-of-order execution CPU which runs the MIPS64 instruction set. The CPU core of Godson-3 is enhanced to support efficient X86 to MIPS binary translation, and to optimize performance, power consumption, reliability and debug methods. Godson-3 adopts two-dimension mesh topology where each node in the mesh includes an 8*8 crossbar which connects four processor cores. The low power design makes the 4-core Godson-3 consume 10 watts at 1GHz. It will be taped out in first half of 2008.

One important application of Godson-3 is the low cost high performance computing (HPC). Based on Godson-3, the design of a national PetaFLOP HPC system and a personal TeraFLOP HPC system are in plan. This presentation will introduce the HPC plans based on the Godson-3 multi-core processor.

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Organised by: Miguel Angel Marquina
Computing Seminars /IT Department

more information http://cern.ch/Computing.Seminars/2008/main.htm

Slides slides.pdf