CERN Computing Seminar

A peek into the world of chip design

by Bob Beutler (Intel until Oct. 2002)

Europe/Zurich
IT Auditorium (CERN)

IT Auditorium

CERN

Description
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This lecture will give some insight into how the Microprocessor Design Group approaches the daunting task of the design of a lead microprocessor as complex as the Pentium IV while under very specific schedule constraints. For a historical perspective, we will start with a quick comparison of the complexity/performance of the Willamette and Prescott (Pentium IV) class of microprocessor with the generations before the Pentium IV (Bob was a member of the design teams for a number of lead microprocessor projects including the 486DX2, Pentium Pro, Willamette Pentium IV and the Prescott Pentium IV). This historical perspective discussion will set the stage for a discussion of some of the details and methodology of the project culture and design engineering culture that were critical to the success of the design efforts for the Willamette and Prescott projects. The Vertical Design Engineer Task Flow Diagram will then be discussed in detail. The insight presented in this lecture should be of benefit and of interest to anyone involved in a large technical project.

About the speaker

Prior to his retirement from Intel in Oct 2002, Bob spent 38 years in the field of Electronic Design Engineering. For the last 18 years Bob was a Senior CMOS Integrated Circuit Design Engineer with Intel's Microprocessor Design Group in Hillsboro, Oregon USA. He was a major contributor involved in the design of a number of lead microprocessor chips including the 486DX2, Pentium Pro, Willamette Pentium IV and most recently the Prescott Pentium IV (which is Intel's newest generation 32-bit microprocessor). Bob has extensive experience in nearly all aspects of microprocessor design including high-level language interpretation, logic design, circuit design, memory design, layout and prototype debug. He also has extensive experience in digital system/circuit design and analog circuit design.Prior to Intel, from 1978 to 1984, Bob was employed with Tektronix in Beaverton, Oregon and was involved in CMOS and Ga-As integrated circuit design. From 1969 to 1978 he was employed with Motorola Semiconductor Products Division in Phoenix and Austin as a member of the Motorola CMOS Standard Products Design Group. From 1965 to 1969 Bob was with the Motorola Government Electronics Division in Scottsdale, Arizona working on board level design of Apollo and Mariner Mars electronic support systems. Over the years he has done a significant amount of technical management and mentoring of Design Engineers. Bob holds 12 patents.


Organiser(s): Miguel Angel Marquina
Computing Seminars / IT Department
more information
Video in CDS