A Vector Math Library for IA-64

COMPUTING SEMINAR


Title	:	A Vector Math Library for IA-64
Speakers	:	Dr. Clemens Roothaan, HP Labs
Date	:	Wednesday 14 June 2000 at 16:00hrs
Place	:	IT Auditorium, bldg 31/3-005
Information	:	http://wwwinfo.cern.ch/seminars
Organiser	:	G.Folger / IT

ABSTRACT

Hewlett-Packard is preparing a Vector Math Library for the IA-64 architecture to appear later this year. During 1998-99 the library was prototyped and validated in a collaboration with CERN. The library deploys several new algorithms and exploits the 82-bit floating-point registers as well as the software pipelining capability of the new Intel architecture. Together these features offer exceptionally good accuracy, very high speed and full versatility accross the whole range of arguments. The speaker will discuss all these features in turn in order to demonstrate the value of this new mathemathical library.